|
 |
|
| |
|
|
For two-position jumpers (3-post), "RIGHT" is
toward the bracket end of the board; "LEFT" is toward the memory
sockets.
* = default value
(TOP = Color *
BOTTOM = Monochrome
INSTALL = Reset to null
REMOVE = Normal operation *
LEFT = Normal reset *
RIGHT = Enable watchdog
INSTALL = Clear CMOS
REMOVE = Operate *
| INSTALL= |
Connect speaker data signal to pin 8 of Combo I/O connector
(P5A) * |
| REMOVE= |
Disconnect |
| INSTALL= |
Connect reset data signal to pin 1 of Combo I/O connector
(P5A) * |
| REMOVE= |
Disconnect |
INSTALL = Dedicate IRQ12 to PS/2 mouse. *
REMOVE = Make IRQ12 available for system use.
LEFT = Keyboard data
RIGHT = Mouse data *
LEFT = Mouse clock *
RIGHT = Keyboard clock
NOTE: JU88 and JU88A must be set to the same function (either mouse
or keyboard) for the peripheral to function properly.
INSTALL = Enable 3.3V monitor.
REMOVE = Disable 3.3V monitor. *
NOTE: JU89 enables the 3.3 volt monitor, which monitors the 3.3V
power plane of the backplane. This voltage is routed to the SBC
via the PICMG® connector. The monitor generates a RESET to the SBC
if 3.3V is below tolerance. If your system does not supply
3.3V to the backplane, this jumper must be removed (disabled).
LEFT = IRQ3
RIGHT = IRQ4 *
LEFT = IRQ3 *
RIGHT = IRQ4
LEFT = IRQ5
RIGHT = IRQ7 *
|
| |
Pins |
| DACK #7 |
1-2 |
| DACK #6 |
3-4 |
| DACK #5 |
5-6 |
| DACK #3 |
7-8 |
| |
Pins |
| DREQ #7 |
1-2 |
| DREQ #6 |
3-4 |
| DREQ #5 |
5-6 |
| DREQ #3 |
7-8 |
The Flash ROM has two programmable sections: the
Boot Block for "flashing" in the BIOS and the Main Block for the executable
BIOS and PnP parameters. Normally only the Main Block is updated when
a new BIOS is flashed into the system.
|
JU110 |
JU115 |
| Program All (Boot and Main) |
Bottom |
Bottom |
| Normal PnP (Program Main Block) |
Bottom * |
Top * |
| Write Protect |
Top |
Top |
| INSTALL= |
Disable on-board active termination for SCSI interface |
| REMOVE= |
Enable * |
INSTALL = Enable VGA interrupt
REMOVE = Disable *
There are five jumpers (J140, J141, W12, W12A
and W99) which must be set correctly to allow the SBC to take full
advantage of the speed of the Pentium microprocessor. The jumper
settings depend on the bare board revision level as indicated in
the following charts.
Bare Board Revision Levels Prior to L-A-09:
CPU |
Synthesizer |
Jumpers |
CPU Speed |
Bus
Clock |
| Speed |
Frequency |
J140 |
J141 |
W12 |
W12A |
W99 |
| 233MHz |
66MHz |
Out |
In |
Bottom |
Bottom |
In |
| 200MHz |
66MHz |
Out |
In |
Bottom |
Top |
In |
| 166MHz |
66MHz |
Out |
In |
Top |
Top |
In |
| 150MHz |
60MHz |
In |
Out |
Top |
Top |
In |
| 133MHz |
66MHz |
Out |
In |
Top |
Bottom |
In |
| 120MHz |
60MHz |
In |
Out |
Top |
Bottom |
In |
| 100MHz |
66MHz |
Out |
In |
Bottom |
Bottom |
In |
| 90MHz |
60MHz |
In |
Out |
Bottom |
Bottom |
In |
| 75MHz |
50MHz |
In |
In |
Bottom |
Bottom |
Out |
Bare Board Revision Levels L-A-09 and Above:
CPU |
Synthesizer |
Jumpers |
CPU Speed |
Bus
Clock |
| Speed |
Frequency |
J140 |
J141 |
W12 |
W12A |
W99 |
| 233MHz |
66MHz |
Out |
In |
Top |
Top |
In |
| 200MHz |
66MHz |
Out |
In |
Top |
Bottom |
In |
| 166MHz |
66MHz |
Out |
In |
Bottom |
Bottom |
In |
| 150MHz |
60MHz |
In |
Out |
Bottom |
Bottom |
In |
| 133MHz |
66MHz |
Out |
In |
Bottom |
Top |
In |
| 120MHz |
60MHz |
In |
Out |
Bottom |
Top |
In |
| 100MHz |
66MHz |
Out |
In |
Top |
Top |
In |
| 90MHz |
60MHz |
In |
Out |
Top |
Top |
In |
|
|
Pin 1 on the connectors is indicated by the square
pad on the PCB.
5 pin single row header, Amp #640456-5
| PIN |
SIGNAL |
| 1 |
LED Power |
| 2 |
Key |
| 3 |
Gnd |
| 4 |
Keylock Data |
| 5 |
Gnd |
34 pin dual row header,
Robinson Nugent #IDH-34LP-S3-TR
| PIN |
SIGNAL |
| 1 |
Gnd |
| 3 |
Gnd |
| 5 |
Gnd |
| 7 |
Gnd |
| 9 |
Gnd |
| 11 |
Gnd |
| 13 |
Gnd |
| 15 |
Gnd |
| 17 |
Gnd |
| 19 |
Gnd |
| 21 |
Gnd |
| 23 |
Gnd |
| 25 |
Gnd |
| 27 |
Gnd |
| 29 |
Gnd |
| 31 |
Gnd |
| 33 |
Gnd |
|
| PIN |
SIGNAL |
| 2 |
N-RPM |
| 4 |
NC |
| 6 |
D-Rate0 |
| 8 |
P-Index |
| 10 |
N-Motoron 1 |
| 12 |
N-Drive Sel2 |
| 14 |
N-Drive Sel1 |
| 16 |
N-Motoron 2 |
| 18 |
N-Dir |
| 20 |
N-Stop Step |
| 22 |
N-Write Data |
| 24 |
N-Write Gate |
| 26 |
P-Track 0 |
| 28 |
P-Write Protect |
| 30 |
N-Read Data |
| 32 |
N-Side Select |
| 34 |
Disk Chng |
|
5 pin single row header, Amp #640456-5
| PIN |
SIGNAL |
| 1 |
Kbd Clock |
| 2 |
Kbd Data |
| 3 |
Key |
| 4 |
Kbd Gnd |
| 5 |
Kbd Power (+5V fused) with
self-resetting fuse |
6 pin single row header, Amp #640456-6
| PIN |
SIGNAL |
| 1 |
Ms Data |
| 2 |
Reserved |
| 3 |
Kbd Gnd |
| 4 |
Kbd Power (+5V fused) with
self-resetting fuse |
| 5 |
Ms Clock |
| 6 |
Reserved |
6 pin mini DIN, Kycon #KMDG-6S-BS-PS
| PIN |
SIGNAL |
| 1 |
Kbd Data/Ms Data |
| 2 |
Reserved |
| 3 |
Gnd |
| 4 |
Kbd Power (+5V fused) with
self-resetting fuse |
| 5 |
Kbd Clock/Ms Clock |
| 6 |
Reserved |
NOTE: The function of the PS/2 Mouse/Keyboard
Connector is controlled by the settings of jumpers JU88 and JU88A.
See the Jumpers section above for an explanation of the jumper
settings.
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
Speaker Data |
| 2 |
Key |
| 3 |
Gnd |
| 4 |
+5V |
8 pin single row header, Amp #640456-8
| PIN |
SIGNAL |
| 1 |
Reset (See JU18 in Configuration
Jumpers above.) |
| 2 |
Gnd |
| 3 |
NC |
| 4 |
Kbd Clock |
| 5 |
Kbd Data |
| 6 |
Kbd Lock Data |
| 7 |
Kbd Power (+5V fused) with
self-resetting fuse |
| 8 |
Speaker Data |
9 pin D, Foxconn International #UDBA11S2LA
| PIN |
SIGNAL |
| 1 |
Carrier Detect |
| 2 |
Receive Data-I |
| 3 |
Transmit Data-0 |
| 4 |
Data Terminal Ready-0 |
| 5 |
Signal Gnd |
|
| PIN |
SIGNAL |
| 6 |
Data Set Ready-I |
| 7 |
Request to Send-O |
| 8 |
Clear to Send-I |
| 9 |
Ring Indicator-I |
|
10 pin dual row header,
Robinson Nugent #IDH-10LP-S3-TR
| PIN |
SIGNAL |
| 1 |
Carrier Detect |
| 3 |
Receive Data-I |
| 5 |
Transmit Data-0 |
| 7 |
Data Terminal Ready-0 |
| 9 |
Signal Gnd |
|
| PIN |
SIGNAL |
| 2 |
Data Set Ready-I |
| 4 |
Request to Send-O |
| 6 |
Clear to Send-I |
| 8 |
Ring Indicator-I |
| 10 |
NC |
|
26 pin dual row header,
Robinson Nugent #IDH-26LP-S3-TR
| PIN |
SIGNAL |
| 1 |
Strobe |
| 3 |
Data Bit 0 |
| 5 |
Data Bit 1 |
| 7 |
Data Bit 2 |
| 9 |
Data Bit 3 |
| 11 |
Data Bit 4 |
| 13 |
Data Bit 5 |
| 15 |
Data Bit 6 |
| 17 |
Data Bit 7 |
| 19 |
ACK |
| 21 |
Busy |
| 23 |
Paper End |
| 25 |
Slct |
|
| PIN |
SIGNAL |
| 2 |
Auto Feed XT |
| 4 |
Error |
| 6 |
Init |
| 8 |
Slct In |
| 10 |
Gnd |
| 12 |
Gnd |
| 14 |
Gnd |
| 16 |
Gnd |
| 18 |
Gnd |
| 20 |
Gnd |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
NC |
|
|
2 pin header, Amp #640456-2
2 pin header, Amp #640456-2
| PIN |
SIGNAL |
| 1 |
Negative External Reset |
| 2 |
Gnd |
40 pin dual row header,
Robinson Nugent #IDH-40LP-S3-TR
| PIN |
SIGNAL |
| 1 |
Reset |
| 3 |
Data 7 |
| 5 |
Data 6 |
| 7 |
Data 5 |
| 9 |
Data 4 |
| 11 |
Data 3 |
| 13 |
Data 2 |
| 15 |
Data 1 |
| 17 |
Data 0 |
| 19 |
Gnd |
| 21 |
DRQ 0 |
| 23 |
IOW |
| 25 |
IOR |
| 27 |
IORDY |
| 29 |
DACK 0 |
| 31 |
IRQ 14 |
| 33 |
Add 1 |
| 35 |
Add 0 |
| 37 |
CS 1P |
| 39 |
IDEACTP |
|
| PIN |
SIGNAL |
| 2 |
Gnd |
| 4 |
Data 8 |
| 6 |
Data 9 |
| 8 |
Data 10 |
| 10 |
Data 11 |
| 12 |
Data 12 |
| 14 |
Data 13 |
| 16 |
Data 14 |
| 18 |
Data 15 |
| 20 |
NC |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
Gnd |
| 28 |
+5V |
| 30 |
Gnd |
| 32 |
IOCS16 |
| 34 |
Gnd |
| 36 |
Add 2 |
| 38 |
CS 3P |
| 40 |
Gnd |
|
40 pin dual row header,
Robinson Nugent #IDH-40LP-S3-TR
| PIN |
SIGNAL |
| 1 |
Reset |
| 3 |
Data 7 |
| 5 |
Data 6 |
| 7 |
Data 5 |
| 9 |
Data 4 |
| 11 |
Data 3 |
| 13 |
Data 2 |
| 15 |
Data 1 |
| 17 |
Data 0 |
| 19 |
Gnd |
| 21 |
DRQ 1 |
| 23 |
IOW |
| 25 |
IOR |
| 27 |
IORDY |
| 29 |
DACK 1 |
| 31 |
MIRQ 0 |
| 33 |
Add 1 |
| 35 |
Add 0 |
| 37 |
CS 1S |
| 39 |
IDEACTS |
|
| PIN |
SIGNAL |
| 2 |
Gnd |
| 4 |
Data 8 |
| 6 |
Data 9 |
| 8 |
Data 10 |
| 10 |
Data 11 |
| 12 |
Data 12 |
| 14 |
Data 13 |
| 16 |
Data 14 |
| 18 |
Data 15 |
| 20 |
NC |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
Gnd |
| 28 |
+5V |
| 30 |
Gnd |
| 32 |
IOCS16 |
| 34 |
Gnd |
| 36 |
Add 2 |
| 38 |
CS 3S |
| 40 |
Gnd |
|
4 pin single row header, Amp #640456-4
| PIN |
SIGNAL |
| 1 |
+5V Pullup |
| 2 |
Light |
| 3 |
Light |
| 4 |
+5V Pullup |
50 pin dual row header,
Robinson Nugent #IDH-50LP-S3-TR
| PIN |
SIGNAL |
| 1 |
Gnd |
| 3 |
Gnd |
| 5 |
Gnd |
| 7 |
Gnd |
| 9 |
Gnd |
| 11 |
Gnd |
| 13 |
Gnd |
| 15 |
Gnd |
| 17 |
Gnd |
| 19 |
Gnd |
| 21 |
Gnd |
| 23 |
Gnd |
| 25 |
NC |
| 27 |
Gnd |
| 29 |
Gnd |
| 31 |
Gnd |
| 33 |
Gnd |
| 35 |
Gnd |
| 37 |
Gnd |
| 39 |
Gnd |
| 41 |
Gnd |
| 43 |
Gnd |
| 45 |
Gnd |
| 47 |
Gnd |
| 49 |
Gnd |
|
| PIN |
SIGNAL |
| 2 |
SCZDB0 |
| 4 |
SCZDB1 |
| 6 |
SCZDB2 |
| 8 |
SCZDB3 |
| 10 |
SCZDB4 |
| 12 |
SCZDB5 |
| 14 |
SCZDB6 |
| 16 |
SCZDB7 |
| 18 |
SCZDBP |
| 20 |
Gnd |
| 22 |
Gnd |
| 24 |
Gnd |
| 26 |
TERMPWR |
| 28 |
Gnd |
| 30 |
Gnd |
| 32 |
SCZATN |
| 34 |
Gnd |
| 36 |
SCZBSY |
| 38 |
SCZACK |
| 40 |
SCZRST |
| 42 |
SCZMSG |
| 44 |
SCZSEL |
| 46 |
SCZCD |
| 48 |
SCZREQ |
| 50 |
SCZIO |
|
15 pin VGA connector, Amp #748390-5
| |
|
| PIN |
SIGNAL |
| |
|
| 1 |
Red |
| |
|
| 2 |
Green |
| |
|
| 3 |
Blue |
| |
|
| 4 |
NC |
| |
|
| 5 |
Gnd |
|
| PIN |
SIGNAL |
| |
|
| 6 |
Gnd |
| |
|
| 7 |
Gnd |
| |
|
| 8 |
Gnd |
| |
|
| 9 |
NC |
| |
|
| 10 |
Gnd |
|
| |
|
| PIN |
SIGNAL |
| |
|
| 11 |
NC |
| |
|
| 12 |
EEDI |
| |
|
| 13 |
HSYNC |
| |
|
| 14 |
VSYNC |
| |
|
| 15 |
EECS |
|
8 pin dual row header, Molex #702-46-0821
(+5V fused with self-resetting fuses)
| PIN |
SIGNAL |
| 1 |
+5V - USB0 |
| 3 |
USB0- |
| 5 |
USB0+ |
| 7 |
Gnd - USB0 |
|
| PIN |
SIGNAL |
| 2 |
+5V - USB1 |
| 4 |
USB1- |
| 6 |
USB1+ |
| 8 |
Gnd - USB1 |
|
|
|
